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	<title>Electricio.us &#187; Article Summary</title>
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		<title>Designing for Power Integrity</title>
		<link>http://electricio.us/2009/09/08/designing-for-power-integrity/</link>
		<comments>http://electricio.us/2009/09/08/designing-for-power-integrity/#comments</comments>
		<pubDate>Wed, 09 Sep 2009 03:41:23 +0000</pubDate>
		<dc:creator>CJ Gervasi</dc:creator>
				<category><![CDATA[Article Summary]]></category>

		<guid isPermaLink="false">http://electricio.us/?p=37</guid>
		<description><![CDATA[It's important to keep power supply planes free of noise and to be sure there is enough copper to handle the DC current load.  ]]></description>
			<content:encoded><![CDATA[<p>A Sept 3, 2009 article from Printed Circuit Design and Fab: <a href="http://pcdandf.com/cms/magazine/171/6613-designing-for-power-integrity">Designing for Power Integrity</a></p>
<p>Article Summary:<br />
Sometimes problems that appear to be related to signal integrity are actually power integrity problems.  This article talks about how you need to be sure to consider the frequencies at which decoupling caps work well and to consider the amount of copper actually available to carry current after holes&#8217; antipad and any other voids in the plane.  Noise at a digital IC&#8217;s power pin can be as problematic as noise on the digital lines connected to it.</p>
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